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UNISONIC TECHNOLOGIES CO., LTD TEA2025D
STEREO AUDIO AMPLIFIER
LINEAR INTEGRATED CIRCUIT
DESCRIPTION
The UTC TEA2025D is a monolithic integrated circuit that intended for use as dual or bridge power audio amplifier portable radio cassette players.
FEATURES
* Dual or bridge connection modes. * Few external components. * Supply voltage down to 3V. * High channel separation. * Very low switch on\off noise. * Max gain of 45dB with adjust external resistor. * Soft clipping. * Thermal protection. * 3VSOP-20
*Pb-free plating product number: TEA2025DL
ORDERING INFORMATION Order Number Normal Lead Free Plating TEA2025D-S20-R TEA2025DL-S20-R TEA2025D-S20-T TEA2025DL-S20-T Package SOP-20 SOP-20 Packing Tape Reel Tube
TEA2025DL-S20-R (1)Packing Type (2)Package Type (3)Lead Plating (1) R: Tape Reel, T: Tube (2) S20: SOP-20 (3) L: Lead Free Plating, Blank: Pb/Sn
www.unisonic.com.tw Copyright (c) 2005 Unisonic Technologies Co., Ltd
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PIN CONFIGURATION
LINEAR INTEGRATED CIRCUIT
BRIDGE OUT2 BOOT2 GND GND GND GND FEEDBACK IN 2(+) SVR
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
Vcc OUT1 BOOT1 GND GND GND GND FEEDBACK IN 1(+) GND(Sub)
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TEA2025D
BLOCK DIAGRAM
GND(Sub ) IN 1+ FEED GND
LINEAR INTEGRATED CIRCUIT
GND
BOOT 1
OUT1
THERMAL PROTECT START CIRCUIT SVR
50 + 1
10k
1 5k DECOUPLING Vss + BRIDGE
IN 2+
2 + 10k 2
50
50
FEED
GND
GND
BOOT 2
OUT2
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ABSOLUTE MAXIMUM RATINGS
LINEAR INTEGRATED CIRCUIT
PARAMETER SYMBOL RATINGS UNIT Supply Voltage VSS 15 V Output Peak Current IO(PEAK) 1.5 A Junction Temperature TJ 150 C Storage Temperature TSTG 150 C Note Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
SYMBOL JC JA RATINGS 15 65 UNIT C/W C/W
PARAMETER Thermal Resistance Junction-case Thermal Resistance Junction-ambient Note: The JA is measured with 4 cm2 copper area heatsink.
ELECTRICAL CHARACTERISTICS (Ta=25C, VCC=9V, Stereo unless otherwise specified)
SYMBOL VSS IQ VOUT GV GV(DIFF) RI RL=4 RL=32 RL=4 RL=8 RL=16 RL=32 RL=4 RL=8 RL=8 RL=16 RL=32 RL=4 RL=8 RL=8 Stereo Bridge VSS=3V 0.7 POUT Stereo 8 (per channel) VSS=6V 1.7 Stereo Bridge TEST CONDITIONS MIN 3 TYP 35 4.5 45 51 30 0.1 0.02 1 0.6 0.25 0.13 2.3 1.3 2.4 0.18 0.06 2.8 1.5 4.7 0.3 0.5 46 1.5 3 52 MAX 12 50 47 53 1 UNIT V mA V dB dB dB k
PARAMETER Supply Voltage Quiescent Current Quiescent Output Voltage Voltage Gain Voltage Gain Difference Input Impedance
43 49
Output Power (d=10%)
VSS=9V VSS=12V VSS=3V POUT Bridge VSS=6V VSS=9V d SVR eN(IN) CT VSS=9V; RL=4 f=100Hz,VR=0.5V,Rg=0 Rg=0 Rg=104 f=1KHz, Rg=10K
W
Distortion Supply Voltage Rejection Input Noise Voltage Cross-Talk
1.5
40
3 6
40
% % dB mV mV dB
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APPLICATION INFORMATION
LINEAR INTEGRATED CIRCUIT
Input Capacitor Input capacitor is PNP type allowing source to be referenced to ground. In this way no input coupling capacitor is required. However, a series capacitor(0.22F) to the input side can be useful in case of noise due to variable resistor contact. Bootstrap The bootstrap connection allows to increase the output swing. The suggested value for the bootstrap capacitors (100F) avoids a reduction of the output signal also at low frequencies and low supply voltage. Voltage Gain Adjust STEREO MODE The voltage gain is determined by on-chip resistors R1 and R2 together with the external RfC1 series connected between pin 8(13) and ground. The frequency response is given approximated by:
VOUT VIN = R1 1 Rf +R2+ JWC1
With Rf=0,C1=100F, the gain results 46dB with pole at f=32Hz The purpose of RfI is to reduce the gain. It is recommended to not reduce it under 36dB. BRIDGE MODE
Figure 7 8(13) Rf C1 R2 50 R1 10K
2(19)
The bridge configuration is realized very easily thanks to an internal voltage divider which provides (at pin 1)the CH1 output signal after reduction. It is enough to connect pin8(inverting input of CH 2 )with a capacitor to pin 1 and to connect to ground the pin 9. The total gain of the bridge is given by:
VOUT VIN = R3 R1 R1 1 (1+ R4 1) Rf +R2+ JWC1 R2+R4+ JWC1
and with the suggested values (C1=C2=100F,Rf=0)means: Gv=52dB
Figure 8
IN OUT R1 10K R2 R1 10K R2 R3 5K R4 50 OUT
With first pole at f=32Hz
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APPLICATION INFORMATION(Cont.)
LINEAR INTEGRATED CIRCUIT
Output Capacitors. The low cut off frequency due to output capacitor depending on the load is given by: 1 FL = 2COUT *RL With COUT 470F and RL=4 ohm it means FL=80Hz. Stability A good layout is recommended in order to avoid oscillations. In general, the designer must pay attention on the following points: -Short wires of components and short connections. -No ground loops. -Bypass of supply voltage with capacitors as nearest as possible to the supply I.C. pin. The low value (polyester) capacitors must have good temperature and frequency characteristics. -No sockets. The heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device damage in the case of excessive junction temperature: all that happens is that POUT (and therefore PD) and Id are reduced. APPLICATION SUGGESTION The recommended values of the components are those shown on stereo application circuit of Fig.2 different values can be used, the following table can help the designer. Component C1,C2 C3 C4,C5 C6,C7 C8,C9 C10,C11 Recommended 0.22F 100F 100F 470F 0.15F 100F Purpose Input DC Decoupling in Case of Slider Contact Noise of Variable Resistor Ripple Rejection Bootstrap Output DC Decoupling Frequency Stability Inverting Input DC Decoupling Degradation of SVR, Increase of THD at Low Frequency and Low Voltage Increase of Low Frequency Cut-off Danger of Oscillations Increase of Low Frequency Cut-off Larger Than Smaller Than
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TYPICAL APPLICATION CIRCUIT
LINEAR INTEGRATED CIRCUIT
Figure 1:Bridge Application(Powerdip)
+V 8 100 F 0 .22 F IN 100 F 9 8 100F 1 10 100F 4,5 ,6,7,11, 14,15,16,17 TEA 2025 D 12 13 20 18 19 0 .15 F 3 2 100F 0 .15 F C3 100F RL IN.2 100 F IN.1 +V 8
Figure 2:Stereo Application (Powerdip)
100 F C1 0 .22 F C4 100 F 18 19 TEA 2025 D C6 470F C8 0 .15 F C5 100F 2 10 4,5,6 ,7,11, 14 ,15 ,16 ,17 C9 0 .15 F C7 470 F OUT.1 RL
12 13
20
C10 100F C2 0 .22 F
9 8
3
C11
100 F
OUT.2 RL
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TYPICAL CHARACTERISTICS
Supply Current vs.Supply Voltage (RL=4) I(mA)
LINEAR INTEGRATED CIRCUIT
Output Voltage vs. Supply Voltage 8 7 VOUT(V)
50
40
6 5
30
4 3
20 STEREO 10 3 6 9 Vss(V) 12 15
2 1 0 3 6 9 Vss(V) STEREO 12 15
3.5 3 2.5 2 1.5 1 0.5 0 3
Output Power vs. Supply Voltage (THD=10%,f=1KHz) PoUT(W)
10
THD vs. Output Power (f=1KHz,Vss=6V) THD(%) RI=8 RI=16 RI=4
RI=8 RI=4 1 RI=16 STEREO 6 9 Vss(V) 12 15 0.1 0 0.2
STEREO 0.4 0.6 0.8 1
PoUT(W)
UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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www.unisonic.com.tw
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